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Heater Controller PCB redesign via OrCAD
Applied Materials, Electrical Engineer (July 2025 - July 2026)
Existing heater controller hardware presented connector mismatching risks and through-hole components that limited assembly reliability. Redesigned the PCB to address both — implementing poka-yoke on J86/J84 connectors to eliminate incorrect mating, converting through-hole resistors to SMD, and evaluating circuit breaker protection updates. Maintained existing J86 output interfaces throughout. Authored the full test specification document and collaborated with layout engineers to bring the design through the complete validation cycle.
Digital Interlock Matrix — Control I/O System
Applied Materials, Electrical Engineer (July 2025 - July 2026)
Control systems operating without defined safety boundaries risk unsafe state transitions that can damage equipment or compromise process integrity. Developed a software interlock matrix for a control I/O system to address this — defining logic conditions that continuously monitor input states and block unsafe operational transitions. Required integrating hardware signal behavior with software control flow to ensure protection held reliably across varied operating conditions.
Heater Controller PCB redesign via OrCAD
Applied Materials, Electrical Engineer (July 2025 - July 2026)
Existing heater controller hardware presented connector mismatching risks and through-hole components that limited assembly reliability. Redesigned the PCB to address both — implementing poka-yoke on J86/J84 connectors to eliminate incorrect mating, converting through-hole resistors to SMD, and evaluating circuit breaker protection updates. Maintained existing J86 output interfaces throughout. Authored the full test specification document and collaborated with layout engineers to bring the design through the complete validation cycle.
Digital Interlock Matrix — Control I/O System
Applied Materials, Electrical Engineer (July 2025 - July 2026)
Control systems operating without defined safety boundaries risk unsafe state transitions that can damage equipment or compromise process integrity. Developed a software interlock matrix for a control I/O system to address this — defining logic conditions that continuously monitor input states and block unsafe operational transitions. Required integrating hardware signal behavior with software control flow to ensure protection held reliably across varied operating conditions.